Figure 15-2. Entering and Leaving the 8086 Program
MODE TRANSITION DIAGRAM
+-----------+
TASK SWITCH | INITIAL |
+----------------| ENTRY |
| OR IRET +-----------+
|
!
+--------------+ INTERRUPT, EXCEPTION +-------------+
| 8086 PROGRAM |----------------------------->| V86 MONITOR |
| (V86 MODE) |<-----------------------------| (PROTECTED |
+-------+------+ IRET | MODE) |
^ | +-----+-------+
| | | ^
| | | |
| | | |
| |TASK SWITCH +-------------------+ TASK SWITCH |
| +----------->| OTHER 80386 TASKS |<---------+ |
+--------------| (PROTECTED MODE) |-------------+
TASK SWITCH +-------------------+ TASK SWITCH
15.3.1 Transitions Through Task Switches
A task switch to or from a V86 task may be due to any of three causes:
In any of these cases, the processor changes the VM bit in EFLAGS according
to the image of EFLAGS in the new TSS. If the new TSS is an 80286 TSS, the
high-order word of EFLAGS is not in the TSS; the processor clears VM in this
case. The processor updates VM prior to loading the segment registers from
the images in the new TSS. The new setting of VM determines whether the
processor interprets the new segment-register images as 8086 selectors or
80386/80286 selectors.
15.3.2 Transitions Through Trap Gates and Interrupt Gates
The processor leaves V86 mode as the result of an exception or interrupt
that vectors via a trap or interrupt gate to a privilege-level zero
procedure. The exception or interrupt handler returns to the 8086 code by
executing an IRET.
Because it was designed for execution by an 8086 processor, an 8086 program in a V86 task will have an 8086-style interrupt table starting at linear address zero. However, the 80386 does not use this table directly. For all exceptions and interrupts that occur in V86 mode, the processor vectors through the IDT. The IDT entry for an interrupt or exception that occurs in a V86 task must contain either:
After the processor stores all the 8086 segment registers on the PL 0 stack, it loads all the segment registers with zeros before starting to execute the handler procedure. This permits the interrupt handler to safely save and restore the DS, ES, FS, and GS registers as 80386 selectors. Interrupt handlers that may be invoked in the context of either a regular task or a V86 task, can use the same prolog and epilog code for register saving regardless of the kind of task. Restoring zeros to these registers before execution of the IRET does not cause a trap in the interrupt handler. Interrupt procedures that expect values in the segment registers or that return values via segment registers have to use the register images stored on the PL 0 stack. Interrupt handlers that need to know whether the interrupt occurred in V86 mode can examine the VM bit in the stored EFLAGS image.
An interrupt handler passes control to the V86 monitor if the VM bit is set in the EFLAGS image stored on the stack and the interrupt or exception is one that the monitor needs to handle. The V86 monitor may either:
Reflecting an interrupt or exception back to the 8086 code involves the following steps:
Figure 15-3. PL 0 Stack after Interrupt in V86 Task
WITHOUT ERROR CODE WITH ERROR CODE 31 0 31 0 +------+-------+<----+ +------+-------+<----+ |######|OLD GS | | |######|OLD GS | | |------+-------| SS:ESP |------+-------| SS:ESP D O |######|OLD FS | FROM TSS |######|OLD FS | FROM TSS I F |------+-------| |------+-------| R |######|OLD DS | |######|OLD DS | E E |------+-------| |------+-------| C X |######|OLD ES | |######|OLD ES | T P |------+-------| |------+-------| I A |######|OLD SS | |######|OLD SS | O N |------+-------| |------+-------| N S | OLD ESP | | OLD ESP | I |--------------| |--------------| | O | OLD EFLAGS | | OLD EFLAGS | | N |------+-------| |------+-------| | |######|OLD CS | NEW |######|OLD CS | ! |------+-------| SS:EIP |------+-------| | OLD EIP | | | OLD EIP | NEW |--------------|<---+ |--------------| SS:EIP | | | ERROR CODE | | * * |--------------|<---+ * * | | * * * *
up:
Chapter 15 -- Virtual 8086 Mode
prev: 15.2 Structure of a V86 Task
next: 15.4 Additional Sensitive Instructions